CS 572 Micro Architecture

Fall 2011

TTH 17:30-18:45, EBA 254

San Diego State University

 

Instructor: Dr. Tao Xie

 GMCS 544, 619-594-2014 

Office hours: TTH 4 pm - 5 pm.

Lectures and Schedule

Date

Topics

Reading Assignments

Slides

  8/30/11

 Introduction

 Ch 1.1-1.6

 Lec01.pdf 

 9/01/11

 Performance Measurement

 Ch 1.8-1.9

 Lec02.pdf

9/06/11

 Instruction Set Architecture

 B.1-B.3, B.4, B.5

 Lec03.pdf

 9/08/11

 Instruction Set Architecture: MIPS1

 B.6, B.7, B.9

 Lec04.pdf

 9/13/11

 Instruction Set Architecture: MIPS2

 

 Lec05.pdf

 9/15/11

 Single-Cycle Processor Implementation1

 

 Lec06.pdf

 9/20/11

 Single-Cycle Processor Implementation2

 

 Lec07.pdf

 9/22/11

 Multi-Cycle Processor Implementation 1

 

 Lec08.pdf

 9/27/11

 Multi-Cycle Processor Implementation 2

 

 Lec09.pdf

 10/04/11

 Pipeline: Introduction

 A.1

 Lec10.pdf

 10/06/11

 Pipeline: Structural Hazards 

 A.2 

 Lec11.pdf

 10/11/11

 Pipeline: Data Hazards

 A.3 

 Lec12.pdf

 10/18/11

 Pipeline: Branch Prediction

 A.3 

 Lec13.pdf

 10/20/11

 Exercise Class

  

 Lec14.pdf

  10/25/11

 Review session for midterm exam

 The Study Guide for the Midterm exam 

 Lec15.pdf 

 10/27/11

 Midterm

 

 

 11/01/11

 Midterm Summary Session

 

 Lec16.pdf

  11/03/11

 Pipeline: Exceptions, control

 A.4

 Lec17.pdf

  11/08/11

 Instruction-level parallelism: Introduction

 Ch2.1

 Lec18.pdf

 11/10/11

 Instruction-level parallelism: Scoreboard

 A.7

 Lec19.pdf

 11/15/11

 Tomasulo’s Algorithm: Introduction and Example

 Ch2.4-Ch2.5

 Lec20.pdf

 11/17/11

 Tomasulo’s Algorithm: A loop example

 Ch2.5

 Lec21.pdf

 11/22/11

 Tomasulo’s Algorithm: Reorder Buffer

 Ch2.6

 Lec22.pdf

 11/29/11

 Memory Hierarchy: Set Associative Cache

 Ch5.1-Ch5.2

 Lec23.pdf

 12/01/11

 Memory Hierarchy: Cache Performance

 

 Lec24.pdf

 12/06/11

 Storage Systems and I/O Topics

 

 Lec25.pdf

 12/08/11

  Final Review

 

 Lec26.pdf

  Thursday, Dec. 15

 Final Exam (15:30 - 17:30)