SIC & SIC/XE Architecture & System Specification

Memory:

1 word = 24 bits (3 8-bit bytes)

total (SIC) = 2¹⁵ (32,768) bytes (32Kbytes)

total (SIC/XE) = 2²⁰ (1,048,576) bytes (1Mbyte)

Registers:

10 x 24 bit registers

MNEMONIC	Register #	Comment/note
A	0	Accumulator
X	1	Index register
L	2	Linkage register (JSUB/RSUB)
B (SIC/XE)	3	Base register
S (SIC/XE)	4	General register
T (SIC/XE)	5	General register
F (SIC/XE)	6	Floating Point Accumulator (48 bits)
PC	8	Program Counter (PC)
SW	9	Status Word (includes Condition Code, CC)

Data Format:

Integers - stored in 24 bit, 2's complement format

Characters stored in 8-bits, in ASCII format

Float (SIC/XE) stored in 48 bit signed-exponent-fraction format:

fraction range: 0..1

exponent: unsigned binary range 0..2047

s: 0=positive, 1=negative

therefore, the absolute floating point number value is: f*2^(e-1024)

Instruction Format:

SIC:

x indicates indexed-addressing mode

SIC/XE:

Format 1 (1 byte):

Format 2 (2 bytes):

Format 3 (3 bytes):

Format 4 (4 bytes):

Formats 3 & 4 introduce addressing mode flag bits:

(note I will use TA for "target address" & disp for "displacement")

flags n & i:

• n=0 & i=1 immediate addressing - TA is used as an operand value (no memory reference)
• n=1 & i=0 indirect addressing - word at TA (in memory) is fetched & used as an address to fetch the operand from
• n=0 & i=0 simple addressing TA is the location of the operand
• n=1 & i=1 simple addressing same as n=0 & i=0

flag x:

x=1 indexed addressing add contents of X register to TA calculation

flag b & p (Format 3 only):

• b=0 & p=0 direct addressing displacement/address field contains TA (note Format 4 always uses direct addressing)
• b=0 & p=1 PC relative addressing - TA=(PC)+disp (-2048<=disp<=2047)*
• b=1 & p=0 Base relative addressing - TA=(B)+disp (0<=disp<=4095)**

* note - in PC relative, disp is interpreted as a 12 bit signed integer in 2's complement

** note - in Base relative, disp is interpreted as a 12 bit unsigned integer

flag e:

e=0 use Format 3

e=1 use Format 4

Addressing Mode Table

Instructions:

SIC provides 26 instructions, SIC/XE provides an additional 33 instructions (59 total)

SIC has 6 categories of instructions:

• load/store registers (LDA, LDX, LDCH, STA, STX, STCH, etc.)
• integer arithmetic operations (ADD, SUB, MUL, DIV) these will use register A and a word in memory, results are placed into register A
• compare (COMP) compares contents of register A with a word in memory and sets CC (Condition Code) to <, >, or =
• conditional jumps (JLT, JEQ, JGT) - jumps according to setting of CC
• subroutine linkage (JSUB, RSUB) - jumps into/returns from subroutine using register L
• input & output control (RD, WD, TD) - see next section

SIC/XE has additional instructions available in each of the above mentioned categories, plus, it has 3 additional categories of instructions:

• floating point arithmetic operations (ADDF, SUBF, MULF, DIVF)
• register manipulation, operands-from-registers, and register-to-register arithmetics (RMO, RSUB, COMPR, SHIFTR, SHIFTL, ADDR, SUBR, MULR, DIVR, etc)

Input and Output (I/O):

2⁸ (256) I/O devices may be attached, each has its own unique 8-bit address

1 byte of data will be transferred to/from the rightmost 8 bits of register A

3 I/O instructions are provided:

• RD
  Read Data from I/O device into A
• WD
  Write data to I/O device from A
• TD
  Test Device determines if addressed I/O device is ready to send/receive a byte of data. The CC (Condition Code) gets set with results from this test:
  
  <   device is ready to send/receive
  =   device isn't ready

SIC/XE Has capability for programmed I/O (I/O device may input/output data while CPU does other work) - 3 additional instructions are provided:

• SIO
  Start I/O
• HIO
  Halt I/O
• TIO
  Test I/O